1. Field
Various embodiments of the present invention relate to a memory device.
2. Description of the Related Art
A memory device includes a plurality of memory cells. A memory cell may include a transistor serving as a switch and a capacitor for storing electric charges that correspond to data. Data stored in the capacitor of the memory cell is determined according to an amount of electric charges charged in the capacitor. When the charge amount is large enough, the corresponding memory cell is determined to store high data (logic 1). When the electric charges are discharged, the corresponding memory cell is determined to store low data (logic 0).
Since data is retained in such a form that electric charges are accumulated in the capacitor, in principle no power is consumed. However, since the initial electric charges stored in the capacitor disappear due to leakage current caused by a PN junction of a MOS transistor or the like, the data may be lost. To prevent such a data loss, the data stored in the memory cell is to be read before the data is lost, and the capacitor is to be recharged according to the read information. Such a recharging operation, which is referred to as a refresh operation, needs to be periodically repeated to retain the data.
FIG. 1 is a diagram illustrating a cell array included in a memory device. In FIG. 1, “BL”S represent bit lines,
In the cell array of FIG. 1, WLK−1, WLK, and WLK+1 represent three word lines successively arranged in parallel to each other. Furthermore, WLK with HIGH_ACT represents a frequently activated word line of which the number of activations or active frequency is high, and WLK−1 and WLK+1 represent adjacent word lines arranged adjacent to the word line WLK. Furthermore, CELL_K−1, CELL_K, and CELL_K+1 represent memory cells coupled to the word lines WLK−1, WLK, and WLK+1, respectively. The memory cells CELL_K−1 CELL_K, and CELL_K+1 include cell transistors TR_K−1, TR_K, and TR_K+1 and cell capacitors CAP_K−1, CAP_K, and CAP_K+1, respectively.
In FIG. 1, when the word line WLK is activated, or precharged, that is, deactivated, the voltage of the word lines WLK−1 and WLK+1 increase or decrease due to coupling, which occurs between the word line WLK and the word lines WLK−1 and WLK+1, thereby affecting an amount of electric charges charged in the cell capacitors CAP_K−1 and CAP_K+1. Thus, when the word line WOK is frequently activated and precharged to toggle between an active state and a precharge state, data stored in the memory cells CELL_K−1 and CELL— +1 may be lost due to the change of the amount of electric charges charged in the cell capacitors CAP_K−1 and CAP_K+1.
Furthermore, electromagnetic waves generated while a word line toggles between the active state and the precharge state may transfer electric charges, for example, electrons, of cell capacitors coupled to adjacent word lines, thereby degrading the data of the memory cell. Such a phenomenon is referred to as word line disturbance or row hammering.